United States

Ferroelectric memories based on hafnium oxide are an attractive alternative to conventional memory technologies due to their scalability and energy efficiency. However, there are still many open questions regarding the optimal material stack and processing conditions for reliable device performance. Here we shed light on the impact of the sputtering process conditions, of the commonly used TiN top electrode, on the ferroelectric properties of Hf1-xZrxO2. We highlight the importance of tuning the texturing and composition of the top electrode in achieving high remanent polarization and improved endurance.

Materials Challenges for Memory

Impact on Ferroelectricity in Hf1-xZrxO2 by TiN Top Electrode Process Conditions

thin films

cmos compatible

hafnium oxide

ferroelectrics

[![](https://assets.underline.io/uploads/markdown_image/1/image/985c8a40b04e56675221c8549975de3c.png)](https://drive.google.com/file/d/1B70nPIeeeqdG4UU70NlYXuKVOHLRuJEo/view?usp=sharing)

### ** History of DRC**
The Device Research Conference (DRC) began in the pre-transistor era with the 1942 establishment of the Conference on Electron Device Research (CEDR). Following William Shockley’s 1948 CEDR presentation of the transistor device, the Solid-State Device Research Conference (SSDRC) was established, with invitation-only attendance.

In the ensuing decades, many exciting firsts were presented at SSDRC, including the use of impurity diffusion in silicon and germanium, the first practical MOSFET, and the first lattice-matched heterojunction.

In 1969, under the leadership or Herbert Kroemer and Cal Quate, the CEDR and SSDRC merged into DRC. In 1970, attendance was opened to all, and the first DRAM (dynamic random-access memory), room temperature lasers, and first CCD (charge-coupled device) were reported—all in the same 1970 DRC meeting!

1976 saw the first official coordination of tandem meetings between DRC and the Electronic Materials Conference (EMC) to bring together the electronic materials and device communities—a custom which persists to this day. In 1991, DRC began publishing its digest with IEEE; they can all be found [here on IEEE Xplore](https://ieeexplore.ieee.org/xpl/conhome/1000199/all-proceedings). Throughout this period, DRC featured reports of many novel and record-setting devices, including the HEMT (High Electron Mobility Transistor), VCSEL (Vertical Cavity Surface Emitting Laser), HBT (Heterojunction Bipolar Transistor), and nanoscale MOSFETs.

In recent years, DRC has continued to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an [article in the Journal of the Electron Device Society](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486). DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

Today, as we look forward to the next 75+ years of device innovation, DRC continues to lead the way in showcasing top-caliber research, facilitating vibrant discussion and debate and acting as a platform to nurture the next generation of device engineers. We welcome you to join us at the next DRC!

To learn more about DRC's history, please see [Aaron Franklin, Debdeep Jena and Deji Akinwande, "75 Years of the Device Research Conference—A History Worth Repeating," in IEEE Journal of the Electron Devices Society, vol. 6, pp. 116-120, 2018. doi: 10.1109/JEDS.2017.2780778](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486).

### **Topics**
* Biological Devices
* Devices for Extreme Conditions
* Heterogeneously Integrated Devices
* Memory Devices
* Modeling and Simulation of Devices
* Nanoscale and Vacuum Devices
* Optoelectronic and Optical Devices
* Other Emerging Devices
* Power Devices
* Quantum Devices
* RF and Terahertz Devices
* Spintronic and Magnetic Devices
* Thin-film Devices
* Wide-bandgap Devices
 
### **Invited Speakers**
* Patrick Fay, University of Notre Dame
* Susanne Hoffmann-Eifert, Peter Grünberg Institute
* Sanghyeon Kim, Korea Advanced Institute of Science and Technology
* Sriram Krishnamoorthy, University of California, Santa Barbara
* Mario Lanza, King Abdullah University of Science and Technology
* Xiuling Li, The University of Texas at Austin
* Marko Radosavljevic, Intel Corporation
* Siddharth Rajan, The Ohio State University
* Giordano Scappucci, Delft University of Technology
* Fisher Yu, University of Arkansas
* Wenjuan Zhu, University of Illinois at Urbana-Champaign




Registration is required to attend this event. If you have not already done so, please use the link below to register for a ticket to the conference:

https://www.mrs.org/drc-2022/registration

Registration Is Required

DRC 2022

DRC continues to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an article in the Journal of the Electron Device Society. 
DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

poster


![](https://assets.underline.io/uploads/markdown_image/1/image/2e10c515564e9ec3287ee4c664011c20.png)

The energy cost of storing and moving data is enormous, and is growing at such a rapid pace that within a few years the power demand may overwhelm some developed nations. Non-volatile memory (NVM) and neuromorphic computing are enabling critical advances in this area, but there are many scientific and technological challenges. This conference will cover the materials challenges of different memory technologies, from the fundamental processes and mechanisms, to industry perspectives on materials specifications and manufacturing.

Von Neumann’s architecture, currently applied to electronic computing systems, is known to be at its optimization limits since CMOS technology cannot be further miniaturized without performance degradation. Neuromorphic computation is an effective alternative as it allows for power-efficient systems with high density, in memory computation and parallel data processing. A key component for this technology is the memristor, whose conductance can be altered upon application of an electric field. These devices have striking similarities to biological synapses, revealing many potential applications in neuromorphic engineering. 
To achieve a fully integrated system consisting of memristors and thin-film transistors (TFTs), both should share the same materials. Here, we study two amorphous oxide semiconductors (AOS) as resistive switching (RS) layers on memristors: indium-gallium-zinc oxide (IGZO) and zinctin oxide (ZTO) and the engineering of the top and bottom contacts. These two materials are widely applied in TFT driver circuits of active-matrix display technology, making them an ideal choice for memristors in neuromorphic system-on-panel solutions.
In the memristive devices we present, the main intrinsic donors within the AOS, commonly referred to as oxygen vacancies, are responsible for the RS, generally following the valence change mechanism (VCM). To explore self-rectification, an asymmetry in the device structure was established. Pt was chosen for the bottom electrode as it is inert and forms a Schottky barrier when in contact with ZTO and IGZO. For the top electrode, Ti/Au was used since Ti has a high oxygen affinity which leads to the removal of oxygen from the AOS layer, forming a highly conductive region at the interface.
We show these devices can be operated at two distinct modes. Device initialization in reverse polarity leads to an abrupt VCM-type counter-8-wise filamentary switching, whereas device initialization in the forward direction reveals an 8-wise area-dependent switching with resistance state ratios up to two orders of magnitude. The latter switching mode maintain the rectifying characteristic and allows analog control over resistance states which provides the means for subsequent high-density processing and storage in a neuromorphic system.[1]
However, Pt and Ti/Au are expensive and, usually, patterned by lift-off, which limits device downsizing, reproducibility, and yield, due to irregularly shaped electrode edges, causing electrical shortcuts. A noble metal-free strategy with easy integration reduces the overall system cost: Mo was employed as bottom and top electrodes which, being patterned by dry etching, improves reproducibility and yield. Here, we present an IGZO-based memristor with Mo electrodes ready for TFT integration tests. With this memristor structure, the current rectification was achieved by oxidizing the bottom Mo at the interface. Devices down to 0.5 μm2 were fabricated using conventional photolithography, with an extraordinary yield of 100%. We
successfully demonstrate the memristor’s synaptic behavior through potentiation and depression, short-term to long-term memory transition and simulation of the learning process.[2]
[1] Casa, N., Deuermeier, J., Martins, J., Carlos, E., Pereira, M., Martins, R., Fortunato, E., Kiazadeh, A., 2D Resistive Switching Based on Amorphous Zinc–Tin Oxide Schottky Diodes. Adv. Electron. Mater. 2020, 6, 1900958.
https://doi.org/10.1002/aelm.201900958
[2] Pereira, M., Deuermeier, J., Nogueira, R., Carvalho, P. A., Martins, R., Fortunato, E., Kiazadeh, A., Noble‐Metal‐Free Memristive Devices Based on IGZO for Neuromorphic Applications. Adv. Electron. Mater. 2020, 6, 2000242.
https://doi.org/10.1002/aelm.202000242

AOS-based memristive devices towards TFT integration: Materials and challenges

As the miniaturizing limit of the traditional memory quickly approaches, resistive random-access memory (RRAM) has shown strong promise owing to simple compositions, relatively fast switching, as well as good endurance and retention. The most commonly accepted resistive switching mechanism is filamentary switching. In filamentary switching, the change in resistance arises from the growth and rupture of localized conduction filaments, usually composed of oxygen vacancies, through the insulating layer. However, the irreversible electroforming process, which is often required to activate the filamentary RRAM devices, has become one major problem in achieving scaling, and low power consumption memory devices. Thus, an electroforming-free RRAM device is highly desired. By incorporating simple binary oxides (HfO2 and CeO2), which are both CMOS compatible, in the form of vertically aligned nanocomposites, improved properties for memristor applications are expected.

Multifunctional electroforming-free HfO2-CeO2 vertically aligned nanocomposite memristors

Nonlinear and hysteretic electrical devices are needed for applications from circuit protection to next-generation computing. Widely-studied devices for resistive switching are based on mass transport, such as the drift of ions in an electric field, and on collective phenomena, such as insulator-metal transitions. We ask whether the large photoconductive response known in many semiconductors can be stimulated in the dark and harnessed to design electrical devices. We design and test devices based on photoconductive CdS, and our results are consistent with the hypothesis that resistive switching arises from point defects that switch between deep- and shallow-donor configurations: defect level switching (DLS). This electronic device design principle - photoconductivity without photons – leverages decades of research on photoconductivity and defect spectroscopy. It is easily generalized and will enable the rational design of nonlinear, hysteretic devices for future electronics. We discuss next-steps to further develop the DLS concept, including demonstrating devices based on oxide and AlGaAs active layers, and developing a theoretical framework to analyze the limits of switching speed and state persistence. 

1. H. Yin, A. Kumar, J. M. LeBeau, and R. Jaramillo, Defect-Level Switching for Highly Nonlinear and Hysteretic Electronic Devices, Phys. Rev. Applied 15, 014014 (2021).


Defect-Level Switching for Highly Nonlinear and Hysteretic Electronic Devices

In my poster, I have shown the stabilization of two distinct topologically protected spin textures of antiskyrmions and elliptical Bloch skyrmions in a nano-stripe of D2d Heusler compound Mn1.4Pt00.9Pd0.1Sn. The simultaneous presence of different textures can be encoded as distinct data bits and can make an improved version of racetrack devices.

Co-existence of distinct magnetic spin textures in a D2d nano-stripe

Interfaces of the magnetic layer in the heterostructure Ta/Co2FeAl/MgO have been studied using hard x-ray photoelectron spectroscopy (HAXPES). Depth-selective information with sub-nanometer resolution is obtained using x-ray standing waves. It is found that the two magnetic species namely, Co and Fe behave very differently at the interfaces; 54% of Fe in the magnetic layer gets either oxidised or alloyed with Ta at the interfaces, as against 48% of Co. Oxidation state of both Co and Fe decreases, as one moves away from the MgO interface. On the average about 0.4 nm of Co2FeAl gets oxidised at MgO interface and 0.6 nm gets alloyed with Ta at the bottom interface. Thermal annealing at 200℃ results in further oxidation of Fe, accompanied by a partial reduction of Co. It is suggested that this opposite behaviour of Fe and Co at the MgO interface may be the cause of the thermal annealing induced shift of the centroid of Fe distribution towards MgO layer, as observed in some STEM studies in such heterostructures. Present results are in conformity with some STEM observations in Cr/Co2FeAl/Ta, in which Fe concentration profile was found to be shifted towards MgO by ~0.1 nm relative to Co upon thermal annealing [Z. Wen, et al., Appl. Phys. Express 10, 013003 (2017).], and suggest that preferential affinity of Fe towards oxygen is the cause of such shift. It may be noted that, in the present case, since x-ray measurements are done non-destructively on the same part of the sample before and after annealing, the results are more reliable.

Depth resolved HAXPES study of interfaces in Ta/Co2FeAl/MgO

Aurivillius phase materials are promising candidates for ferroelectric random access memories (FRAM). However, their application is limited by high coercive field and low remanent polarization. The concept of high entropy ceramics opens up the possibility to optimise the properties of Aurivilius phase ferroelectrics. In this research [1], two new multi-element substituted Aurivillius phase ceramics, (Ca0.25Sr0.25Ba0.25Pb0.25)Bi2Nb2O9 and (Ca0.2Sr0.2Ba0.2Pb0.2Nd0.1Na0.1)Bi2Nb2O9 are prepared. Both ceramics are single phase, exhibiting orthorhombic symmetry with space group A21am at room temperature. The frequency dependence of the temperature of the dielectric permittivity peak, Tm, shows relaxor behaviour for both ceramics. Multi-domain configurations, including long range ordered ferroelectric domains and polar nano regions (PNRs), were observed using piezoresponse force microscopy (PFM). Under an applied DC field, the PNRs irreversibly transformed to micro-meter sized domains, which is consistent with the Vogel-Fulcher Law fitted results that show that the freezing temperatures of the two ceramics are above room temperature The multi domain configuration is beneficial for decreasing the coercive field and increasing the remnant polarization, which provides a feasible method to optimize ferroelectric properties of Aurivillius phase ferroelectrics to be used as FRAM devices.

Multi elements substituted Aurivillius phase relaxor ferroelectrics using high entropy design concept

In quest of ultra-nonlinear switching kinetics in ReRAM devices, field-accelerated ion transport in solids has attracted great interest as a potential source of non-linear response. We employed large-scale Molecular Dynamics simulations to explore the impact of external electric fields on the rates of ion transport in ceria. We found that the standard models cannot account for the non-linear high-field regime and instead propose a new analytical model which excellently predicts the behaviour at all field strengths. Focussing on the interplay between electric fields and grain boundaries, we explore the tunability of grain-boundary resistances through applying large electric fields.

Tuning grain-boundary resistances for ReRAM

Memtransistors, an emerging type of device where the electrostatically coupled gate terminal governs the memristive charge transport, are potential candidates for applications revolving in-memory computing and brain-like computing [1-3]. However, the accurate determination of memory states and understanding of device physics across all operational regimes remains a challenge with existing models [1,4]. Here, a physics based model incorporating selenium vacancy dynamics, device self-heating with both electron and hole conduction was used to study defect-engineered ambipolar WSe2 memtransistors. This novel approach of modelling memtransistors has revealed that changes in channel electrostatics due selenium vacancy migrations lead to threshold voltage shifts which result in memristive behaviour. We show that a combination of 2D electrostatics and electron screening, induced changes in lateral electric field distribution, which results in gate voltage dependent memristive behaviour. These findings provide keen insights into control of changes in conductance states for all operational regimes, which would lead to more accurate predictions in development of memtransistors for various future memory technologies.

Investigation of memristive behaviour in defect engineered WSe2 memtransistors

Human brain-inspired neuromorphic computing (NC), which emulates neural activities, is considered for the low-power implementation of artificial intelligence. The realization of hardware elements, such as synaptic devices, is an essential path towards this goal. Electrolyte gating has been widely used for conductance modulation by massive carrier injections at low voltage and has been proven to be an effective way of emulating synaptic functions. Synaptic devices, in the form of synaptic transistors, have been studied using a wide variety of materials like oxides [1], organic materials [2], and 2D materials [3]. However, studies on metal-based ferromagnetic synaptic transistors remain unexplored. Additionally, a synaptic device based on magnetic metal has a spin degree of freedom that can be tuned along with. Here, we have demonstrated a three-terminal cobalt-based synaptic transistor by electrolyte gating at room temperature, which is the first kind of such studies. The working principle of the transistor is based on the formation of an electric double layer (EDL) at the interface of ionic liquid and channel and by intercalation/ extraction of oxygen ions. 
We have achieved gating controlled non-volatile, multilevel conducting states for analog computing. The device could successfully emulate essential synaptic functions related to short-term plasticity and long-term plasticity. Moreover, a transition from short-term memory to long-term memory could be achieved by tuning gate pulse amplitude, duration, and number. The crucial cognitive functions of learning, forgetting, re-learning, and the re-forgetting process were emulated. Along with memory and learning, the device showed dynamic filtering behavior as well. These results provide an insight into the potential application of ferromagnetic metal-based synaptic transistor for large-scale, low power consuming, silicon compatible neuromorphic computing network.

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